diff options
Diffstat (limited to 'firmware/src/p2m.c')
| -rw-r--r-- | firmware/src/p2m.c | 126 |
1 files changed, 126 insertions, 0 deletions
diff --git a/firmware/src/p2m.c b/firmware/src/p2m.c new file mode 100644 index 0000000..422cd34 --- /dev/null +++ b/firmware/src/p2m.c @@ -0,0 +1,126 @@ +/* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+ * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+ * THE AUTHORS SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+ * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. USE IT AT YOUR OWN RISK */
+
+#include <LPC17xx.h>
+
+#define SPI
+
+#ifdef DMA
+
+#include "dac.h"
+#include "sample.h"
+
+int main (void)
+{
+ dac_init();
+
+ // int i = 0;
+ while(1) {
+ // fiprintf(stderr, "Play #%d: %d samples\n\r", i++, sizeof(samples) / sizeof(short));
+ dac_play_samples(samples, sizeof(samples) / sizeof(short));
+ }
+ return 0;
+}
+
+#endif
+volatile uint32_t temp;
+
+void _delay(uint32_t del);
+
+#ifdef BLINKY
+
+int main (void)
+{
+ LPC_SC->PCONP |= ( 1 << 15 ); // power up GPIO
+ LPC_GPIO1->FIODIR |= 1 << 29; // puts P1.29 into output mode.
+ while(1)
+ {
+ LPC_GPIO1->FIOPIN |= 1 << 29; // make P1.29 high
+ _delay( 1 << 24 );
+ LPC_GPIO1->FIOPIN &= ~( 1 << 29 ); // make P1.29 low
+ _delay( 1 << 24 );
+ }
+ return 0;
+
+}
+
+#endif
+
+#ifdef UART
+
+#include "LPC17xx.h"
+#include <stdint.h>
+#include "uart.h"
+
+int main (void)
+{
+ /* SystemClockUpdate() updates the SystemFrequency variable */
+ // SystemCoreClockUpdate();//SystemClockUpdate();
+ UARTInit(0, 115200); /* baud rate setting */
+ // UARTInit(1, 8000); /* baud rate setting */
+
+ LPC_SC->PCONP |= ( 1 << 15 ); // power up GPIO
+ LPC_GPIO1->FIODIR |= 1 << 29; // puts P1.29 into output mode.
+
+ while (1) {
+ LPC_GPIO1->FIOPIN |= 1 << 29; // make P1.29 high
+
+ //LPC_UART0->IER = IER_THRE | IER_RLS; // Disable RBR
+ UARTSend(0, (uint8_t *)"hello\n\r", 7);
+ //LPC_UART0->IER = IER_THRE | IER_RLS | IER_RBR; // Re-enable RBR
+
+ _delay( 1 << 22 );
+
+ ///
+
+ LPC_GPIO1->FIOPIN &= ~( 1 << 29 ); // make P1.29 low
+ /*
+ LPC_UART0->IER = IER_THRE | IER_RLS; // Disable RBR
+ UARTSend( 0, (uint8_t *)"l", 1);
+ LPC_UART0->IER = IER_THRE | IER_RLS | IER_RBR; // Re-enable RBR
+ */
+ _delay( 1 << 22 );
+
+ }
+}
+
+#endif
+
+#ifdef SPI
+
+#include "LPC17xx.h"
+#include <stdint.h>
+#include "uart.h"
+
+int main (void)
+{
+ UARTInit(0, 115200); /* baud rate setting */
+
+ UARTSend(0, (uint8_t *)"init\n\r", 6);
+
+ // PCONP register (Table 46), set bit PCSPI.
+ LPC_SC->PCONP |= 1 << 8;
+
+ // In the PCLKSEL0 register (Table 40), set bit PCLK_SPI. In master mode, the
+ // clock must be an even number greater than or equal to 8
+ LPC_SC->PCLKSEL0PCLK_SPI = 0;//(3 << 17);
+ // 1Mhz
+
+ while (1) {
+ UARTSend(0, (uint8_t *)"hello\n\r", 7);
+
+ _delay( 1 << 22 );
+ }
+}
+
+#endif
+
+void _delay(uint32_t del)
+{
+ uint32_t i;
+ for(i=0;i<del;i++)
+ temp = i;
+}
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