diff options
Diffstat (limited to 'firmware/drivers')
| -rw-r--r-- | firmware/drivers/i2s.c | 61 | ||||
| -rw-r--r-- | firmware/drivers/i2s.h | 71 |
2 files changed, 94 insertions, 38 deletions
diff --git a/firmware/drivers/i2s.c b/firmware/drivers/i2s.c index df32801..2d900be 100644 --- a/firmware/drivers/i2s.c +++ b/firmware/drivers/i2s.c @@ -32,7 +32,7 @@ void i2s_set_power(int power) // Remark: On reset, the I²S interface is disabled (PCI2S = 0). uint32_t *pconp = (uint32_t *)0x400FC0C4; *pconp &= ~(0b1 << 27); // Clear bit - *pconp |= ~( ((power != 0) & 0b1) << 27); // Set bit + *pconp |= ((power != 0) & 0b1) << 27; // Set bit } void i2s_set_clksel(i2s_clksel_t sel) @@ -91,7 +91,7 @@ void i2s_set_pinsel() ; } -void i2s_set_dao_register(wordwidth_t ww, channels_t ch) +void i2s_set_dao_register(i2s_wordwidth_t ww, i2s_channels_t ch) { // See table 405, pg. 476 uint32_t *i2sdao = (uint32_t*)0x400A8000; @@ -106,7 +106,7 @@ void i2s_set_dao_register(wordwidth_t ww, channels_t ch) ; } -void i2s_set_dai_register(wordwidth_t ww, channels_t ch) +void i2s_set_dai_register(i2s_wordwidth_t ww, i2s_channels_t ch) { // See table 406, pg. 477 uint32_t *i2sdai = (uint32_t*)0x400A8004; @@ -149,7 +149,7 @@ void i2s_set_rx_clock_bitrate(uint8_t bitrate) *i2srxbitrate = (bitrate & 0b111111); } -void i2s_set_tx_mode_control(clksel_t c, int _4pin, int mcena) +void i2s_set_tx_mode_control(i2s_tx_clksel_t c, int _4pin, int mcena) { // See table 417, pg 482 uint32_t *i2stxmode = (uint32_t*)0x400A8030; @@ -159,7 +159,7 @@ void i2s_set_tx_mode_control(clksel_t c, int _4pin, int mcena) ; } -void i2s_set_rx_mode_control(clksel_t c, int _4pin, int mcena) +void i2s_set_rx_mode_control(i2s_rx_clksel_t c, int _4pin, int mcena) { // See table 418, pg 483 uint32_t *i2srxmode = (uint32_t*)0x400A8034; @@ -280,19 +280,54 @@ int i2s_get_state_tx_level() return (*i2sstate >> 16) & 0b1111; // bit 16-19 } -void i2s_init() +int i2s_init(int pclkdiv, int bitrate, int x, int y, + int bitwidth, int channels) { i2s_set_power(1); - i2s_set_clksel(I2S_CCLK_2); + + i2s_clksel_t clk = I2S_CCLK; + switch(pclkdiv) { + case 1: clk = I2S_CCLK; break; + case 2: clk = I2S_CCLK_2; break; + case 4: clk = I2S_CCLK_4; break; + case 8: clk = I2S_CCLK_8; break; + default: + return 1; + } + i2s_set_clksel(clk); + i2s_set_pinsel(); - i2s_set_dao_register(WW_16_BIT, CH_STEREO); - i2s_set_tx_rate(1, 1); - i2s_set_tx_clock_bitrate(7); + + i2s_wordwidth_t ww = I2S_WW_16_BIT; + switch(bitwidth) { + case 8: ww = I2S_WW_8_BIT; break; + case 16: ww = I2S_WW_16_BIT; break; + case 32: ww = I2S_WW_32_BIT; break; + default: + return 1; + } + + i2s_channels_t ch = I2S_CH_MONO; + switch(channels) { + case 1: ch = I2S_CH_MONO; break; + case 2: ch = I2S_CH_STEREO; break; + default: + return 1; + } + + i2s_set_dao_register(ww, ch); + + if((x & 0xff) != x || (y & 0xff) != y) return 1; + i2s_set_tx_rate(x, y); + + if((bitrate & 0b111111) != bitrate) return 1; + i2s_set_tx_clock_bitrate(bitrate); + i2s_set_tx_mode_control(CLK_TX_SRC, 1, 1); - i2s_tx_reset(); + //i2s_tx_reset(); i2s_tx_stop(); - + /* int i; i = i2s_get_state_irq(); i = i2s_get_state_dmareq1(); @@ -300,6 +335,8 @@ void i2s_init() i = i2s_get_state_rx_level(); i = i2s_get_state_tx_level(); (void)i; + */ + return 0; } #if 0 diff --git a/firmware/drivers/i2s.h b/firmware/drivers/i2s.h index 8107e30..6a8d446 100644 --- a/firmware/drivers/i2s.h +++ b/firmware/drivers/i2s.h @@ -70,30 +70,30 @@ void i2s_set_clksel(i2s_clksel_t sel); void i2s_set_pinsel(); typedef enum { - WW_8_BIT = 0b00, // 8-bit data - WW_16_BIT = 0b01, // 16-bit data - // WW_RESERVED = 0b10, // Reserved, do not use this setting - WW_32_BIT = 0b11, // 32-bit data -} wordwidth_t; + I2S_WW_8_BIT = 0b00, // 8-bit data + I2S_WW_16_BIT = 0b01, // 16-bit data + //I2S_WW_RESERVED = 0b10, // Reserved, do not use this setting + I2S_WW_32_BIT = 0b11, // 32-bit data +} i2s_wordwidth_t; typedef enum { - CH_MONO = 0b1, // Data is mono format - CH_STEREO = 0b0, // Data is stereo format -} channels_t; + I2S_CH_MONO = 0b1, // Data is mono format + I2S_CH_STEREO = 0b0, // Data is stereo format +} i2s_channels_t; /** * Sets DAO register values and stops/resets the bus. * @param ww Word width of pcm values. * @param ch Number of channels (mono/stereo) */ -void i2s_set_dao_register(wordwidth_t ww, channels_t ch); +void i2s_set_dao_register(i2s_wordwidth_t ww, i2s_channels_t ch); /** * Sets DAI register values and stops/resets the bus. * @param ww Word width of pcm values. * @param ch Number of channels (mono/stereo) */ -void i2s_set_dai_register(wordwidth_t ww, channels_t ch); +void i2s_set_dai_register(i2s_wordwidth_t ww, i2s_channels_t ch); /** * Set clock transmit rate as PCLK_I2S * (X/Y) / 2 @@ -136,17 +136,22 @@ void i2s_set_rx_clock_bitrate(uint8_t bitrate); typedef enum { CLK_TX_SRC = 0b00, ///< Select the TX fractional rate divider clock output as the source CLK_RX_MCLK = 0b10, ///< Select the RX_MCLK signal as the TX_MCLK clock source -} clksel_t; +} i2s_tx_clksel_t; /** * */ -void i2s_set_tx_mode_control(clksel_t c, int _4pin, int mcena); +void i2s_set_tx_mode_control(i2s_tx_clksel_t c, int _4pin, int mcena); + +typedef enum { + CLK_RX_SRC = 0b00, ///< Select the RX fractional rate divider clock output as the source + CLK_TX_MCLK = 0b10, ///< Select the TX_MCLK signal as the RX_MCLK clock source +} i2s_rx_clksel_t; /** * */ -void i2s_set_rx_mode_control(clksel_t c, int _4pin, int mcena); +void i2s_set_rx_mode_control(i2s_rx_clksel_t c, int _4pin, int mcena); void i2s_tx_reset(); void i2s_tx_stop(); @@ -173,14 +178,17 @@ void i2s_rx_start(); * I2STXFIFO: 0x400A 8008 - 8 x 32 bit (see table 407, pg 477) */ #define TF(t, n) t *n = (t*)0x400A8008 -inline void i2s_write_pcm_8_mono(int8_t s) { TF(int8_t, t); t[0] = s; } -inline void i2s_write_pcm_16_mono(int16_t s) { TF(int16_t, t); t[0] = s; } -inline void i2s_write_pcm_32_mono(int32_t s) { TF(int32_t, t); t[0] = s; } -inline void i2s_write_pcm_8_stereo(int8_t l, int8_t r) +static inline void i2s_write_pcm_8_mono(int8_t s) +{ TF(int8_t, t); t[0] = s; } +static inline void i2s_write_pcm_16_mono(int16_t s) +{ TF(int16_t, t); t[0] = s; } +static inline void i2s_write_pcm_32_mono(int32_t s) +{ TF(int32_t, t); t[0] = s; } +static inline void i2s_write_pcm_8_stereo(int8_t l, int8_t r) { TF(int8_t, t); t[0] = l; t[1] = r; } -inline void i2s_write_pcm_16_stereo(int16_t l, int16_t r) +static inline void i2s_write_pcm_16_stereo(int16_t l, int16_t r) { TF(int16_t, t); t[0] = l; t[1] = r; } -inline void i2s_write_pcm_32_stereo(int32_t l, int32_t r) +static inline void i2s_write_pcm_32_stereo(int32_t l, int32_t r) { TF(int32_t, t); t[0] = l; t[1] = r; } /** @@ -188,20 +196,31 @@ inline void i2s_write_pcm_32_stereo(int32_t l, int32_t r) * I2SRXFIFO: 0x400A 800C - 8 x 32 bit (see table 408, pg 478) */ #define RF(t, n) t *n = (t*)0x400A800C -inline void i2s_read_pcm_8_mono(int8_t *s) { RF(int8_t, t); *s = t[0]; } -inline void i2s_read_pcm_16_mono(int16_t *s) { RF(int16_t, t); *s = t[0]; } -inline void i2s_read_pcm_32_mono(int32_t *s) { RF(int32_t, t); *s = t[0]; } -inline void i2s_read_pcm_8_stereo(int8_t *l, int8_t *r) +static inline void i2s_read_pcm_8_mono(int8_t *s) +{ RF(int8_t, t); *s = t[0]; } +static inline void i2s_read_pcm_16_mono(int16_t *s) +{ RF(int16_t, t); *s = t[0]; } +static inline void i2s_read_pcm_32_mono(int32_t *s) +{ RF(int32_t, t); *s = t[0]; } +static inline void i2s_read_pcm_8_stereo(int8_t *l, int8_t *r) { RF(int8_t, t); *l = t[0]; *r = t[1]; } -inline void i2s_read_pcm_16_stereo(int16_t *l, int16_t *r) +static inline void i2s_read_pcm_16_stereo(int16_t *l, int16_t *r) { RF(int16_t, t); *l = t[0]; *r = t[1]; } -inline void i2s_read_pcm_32_stereo(int32_t *l, int32_t *r) +static inline void i2s_read_pcm_32_stereo(int32_t *l, int32_t *r) { RF(int32_t, t); *l = t[0]; *r = t[1]; } /** * Convenience function for power, pin, clock and register configuration. + * @param pclkdiv Value of pclkdiv as found by the clkcalc tool. + * @param bitrate Value of bitrate as found by the clkcalc tool. + * @param x Value of x as found by the clkcalc tool. + * @param y Value of y as found by the clkcalc tool. + * @param bitwidth Width of each sample in bits (8, 16 or 32). + * @param channels Number of channels (1 or 2). + * @return 0 on success, 1 on error. */ -void i2s_init(); +int i2s_init(int pclkdiv, int bitrate, int x, int y, + int bitwidth, int channels); /** |