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Diffstat (limited to 'firmware/drivers/wm8523.c')
-rw-r--r--firmware/drivers/wm8523.c111
1 files changed, 40 insertions, 71 deletions
diff --git a/firmware/drivers/wm8523.c b/firmware/drivers/wm8523.c
index 36d293a..08b8d97 100644
--- a/firmware/drivers/wm8523.c
+++ b/firmware/drivers/wm8523.c
@@ -27,100 +27,69 @@
#include "wm8523.h"
#include <string.h>
-#include <lpc17xx_spi.h>
+#include <cli.h>
+
+#include "spi.h"
#define WM8523_WRITE 0
#define WM8523_READ 1
-static SPI_CFG_Type spi_cfg;
-static LPC_SPI_TypeDef spi;
-
-typedef struct __attribute__ ((packed)) {
- uint8_t rw:1; ///< See WM8523_WRITE and WM8523_READ
- uint8_t reg:7; ///< See page 35 in the WM8523 manual.
- uint16_t data;
+typedef union {
+ struct __attribute__ ((packed)) {
+ uint8_t rw:1; ///< See WM8523_WRITE and WM8523_READ
+ uint8_t reg:7; ///< See page 35 in the WM8523 manual.
+ uint16_t data;
+ } val;
+ uint8_t data[3];
} WM8523_transfer_t;
-void WM8523_Init()
-{
- // 16 bit data tranfers
- spi_cfg.Databit = SPI_DATABIT_16;
-
- // WM8523 samples bits on rising edges. Mode 0 or 3 will work
- // http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus#Clock_polarity_and_phase
-
- // Mode 0
- spi_cfg.CPHA = SPI_CPHA_FIRST; // 0
- spi_cfg.CPOL = SPI_CPOL_HI; // 0
- /*
- // Mode 3
- spi_cfg.CPHA = SPI_CPHA_SECOND; // 1
- spi_cfg.CPOL = SPI_CPOL_LO; // 1
- */
-
- // We are the master
- spi_cfg.Mode = SPI_MASTER_MODE;
-
- // We run on a little endian mcu.
- spi_cfg.DataOrder = SPI_DATA_LSB_FIRST;
-
- // Se WM8523 manual page 14. Min clock pulse width 40ns ~= 25MHz
- spi_cfg.ClockRate = 1000000000; // 1MHz
-
- SPI_Init(&spi, &spi_cfg);
+void WM8523_init()
+{
+ cli_write("sizeof: %d", sizeof(WM8523_transfer_t));
+ spi_init();
}
-static volatile int spi_done = 0;
-void spi_mark_as_done()
+void WM8523_deinit()
{
- spi_done = 1;
+ spi_deinit();
}
-static void send(void *data, size_t size)
+void WM8523_write(uint8_t reg, uint16_t data)
{
- SPI_DATA_SETUP_Type dst;
- memset(&dst, 0, sizeof(dst));
- dst.rx_data = data;
- dst.length = size;
- dst.callback = spi_mark_as_done;
-
- spi_done = 0;
- SPI_ReadWrite(&spi, &dst, SPI_TRANSFER_INTERRUPT);
+ WM8523_transfer_t t;
+ t.val.rw = WM8523_WRITE;
+ t.val.reg = reg;
+ t.val.data = data;
- while(!spi_done) {}
+ WM8523_transfer_t r;
+ r.val.data = 0xffff;
+
+ spi_read_write(t.data, r.data, 3);
}
-static void receive(void *data, size_t size)
+uint16_t WM8523_read(uint8_t reg)
{
- // http://anhnvnguyen.blogspot.dk/2010/04/lpc17xx-gpio-basic_05.html
- // TODO: set SSEL0 low
- // PINSEL3[13:12] = p1.21 (SSEL0)
- LPC_PINCON->PINSEL3 &= ~((1<<13)|(1<<12)); // set to 00
-
- SPI_DATA_SETUP_Type dst;
- memset(&dst, 0, sizeof(dst));
- dst.tx_data = data;
- dst.length = size;
- dst.callback = spi_mark_as_done;
+ WM8523_transfer_t t;
+ t.val.rw = WM8523_READ;
+ t.val.reg = reg;
+ t.val.data = 0xffff;
- spi_done = 0;
- SPI_ReadWrite(&spi, &dst, SPI_TRANSFER_INTERRUPT);
-
- while(!spi_done) {}
+ WM8523_transfer_t r;
- // TODO: set SSEL0 high
+ spi_read_write(t.data, r.data, 3);
+
+ return r.data[0] | (r.data[1] << 8);//r.val.data;
}
/**
Volume update registers R06h and R07h are unavailable in SPI control mode.
To use volume update in software control mode, I2C mode must be used.
*/
-void WM8523_Configure()
+void WM8523_configure()
{
- WM8523_transfer_t transfer;
- transfer.rw = WM8523_READ;
- transfer.reg = 0; // R0 read version : 0x8523
- transfer.data = 0;
- //send(&transfer, sizeof(transfer));
- receive(&transfer, sizeof(transfer));
+ spi_configure();
+
+ uint16_t id = WM8523_read(0); // Read chip id from reg0.
+
+ cli_write("=%d=", id); // should be 34595 (0x8523)
}