/* -*- Mode: C++; tab-width: 2; indent-tabs-mode: nil; c-basic-offset: 2 -*- */
/***************************************************************************
 *            i2s.h
 *
 *  Thu Aug 21 18:09:54 CEST 2014
 *  Copyright 2014 Bent Bisballe Nyeng
 *  deva@aasimon.org
 ****************************************************************************/

/*
 *  This file is part of Pedal2Metal.
 *
 *  Pedal2Metal is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  Pedal2Metal is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with Pedal2Metal; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA.
 */
#ifndef __PEDAL2METAL_I2S_H__
#define __PEDAL2METAL_I2S_H__

#include <stdint.h>

void i2s_init();

/**
 * Enables accesses on FIFOs, places the transmit channel in unmute mode.
 */
void i2s_tx_start();

/**
 * Disables accesses on FIFOs, places the transmit channel in mute mode.
 */
void i2s_tx_stop();

/**
 * This bit reflects the presence of Receive Interrupt or Transmit Interrupt.
 * This is determined by comparing the current FIFO levels to the rx_depth_irq
 * and tx_depth_irq fields in the I2SIRQ register.
 */
int i2s_get_state_irq();

/**
 * This bit reflects the presence of Receive or Transmit DMA Request 1. This is
 * determined by comparing the current FIFO levels to the rx_depth_dma1 and
 * tx_depth_dma1 fields in the I2SDMA1 register.
 */
int i2s_get_state_dmareq1();

/**
 * This bit reflects the presence of Receive or Transmit DMA Request 2. This is
 * determined by comparing the current FIFO levels to the rx_depth_dma2 and
 * tx_depth_dma2 fields in the I2SDMA2 register.
 */
int i2s_get_state_dmareq2();

/**
 * Reflects the current level of the Receive FIFO.
 */
int i2s_get_state_rx_level();

/**
 * Reflects the current level of the Transmit FIFO.
 */
int i2s_get_state_tx_level();


#if 0

#define I2S_DMA_ENABLED		1

#define BUFSIZE				0x200
//(1097 * sizeof(short) * 2)/*stereo*/
//((int)(sizeof(samples) * 2/*stereo*/))
#define RXFIFO_EMPTY		0
#define TXFIFO_FULL			8

extern void I2S_IRQHandler( void );
extern void I2SStart( void );
extern void I2SStop( void );
extern void I2SInit( void );

#endif

#endif/*__PEDAL2METAL_I2S_H__*/