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-rw-r--r--firmware/Makefile23
-rwxr-xr-xfirmware/fix-lpcchecksum33
-rw-r--r--firmware/lpc17xx/LPC17xx.ld386
-rw-r--r--firmware/openocd.cfg3
4 files changed, 256 insertions, 189 deletions
diff --git a/firmware/Makefile b/firmware/Makefile
index e398623..f7edae3 100644
--- a/firmware/Makefile
+++ b/firmware/Makefile
@@ -44,10 +44,16 @@ PRFLAGS ?=
LINKER_SCRIPT = ${LPC}/LPC17xx.ld
CSRCS = \
${LPC}/startup_LPC17xx.c \
- $(wildcard ${CMSIS}/*.c) \
- $(wildcard ${LPC}/*.c) \
- $(wildcard ${DRV}/*.c) \
+ ${LPC}/system_LPC17xx.c \
$(wildcard ${SRC}/*.c)
+
+# ${DRV}/*.c \
+
+
+# $(wildcard ${CMSIS}/*.c) \
+# $(wildcard ${LPC}/*.c) \
+# $(wildcard ${DRV}/*.c) \
+# $(wildcard ${SRC}/*.c)
CSRCS += ${SRC}/${PROJ}.c
ASRCS =
@@ -90,8 +96,15 @@ nuke: clean
-$(RM) -f *.hex *.bin
.PHONY : flash
+#flash: $(EXECNAME)
+# $(CP) -O ihex $(EXECNAME) $(PROJ).hex
+# openocd -f openocd.cfg -c 'flash write_image erase $(PROJ).hex' -c 'verify_image $(PROJ).hex' -c 'reset run'
flash: $(EXECNAME)
- $(CP) -O ihex $(EXECNAME) $(PROJ).hex
- openocd -f openocd.cfg -c 'flash write_image erase $(PROJ).hex' -c 'verify_image $(PROJ).hex' -c 'reset run'
+ $(CP) -O binary $(EXECNAME) $(PROJ).bin
+ ./fix-lpcchecksum $(PROJ).bin
+ openocd -f openocd.cfg \
+ -c 'flash write_image erase $(PROJ).bin' \
+ -c 'verify_image $(PROJ).bin' \
+ -c 'reset run'
-include $(CSRCS:.c=.d)
diff --git a/firmware/fix-lpcchecksum b/firmware/fix-lpcchecksum
new file mode 100755
index 0000000..5c57871
--- /dev/null
+++ b/firmware/fix-lpcchecksum
@@ -0,0 +1,33 @@
+#!/usr/bin/perl
+use strict;
+use warnings;
+use FindBin qw($Bin $Script);
+
+my ($bfn) = @ARGV;
+die "Syntax: $Script <bin file to fix>" unless $bfn and -f $bfn;
+
+open BIN, "<$bfn" or die "Unable to read $bfn: $!";
+my $vectors;
+read(BIN, $vectors, 8*4) == 8*4 or die "Failed to read vectors";
+my @vectors = unpack("L"x8, $vectors);
+print "Existing vectors: ".join(' ', map {sprintf("%08x", $_)} @vectors[0..6])."\n";
+close BIN;
+print "Existing checksum: ".sprintf("%08x", $vectors[7])."\n";
+
+my $cs = 0;
+for my $v (@vectors[0..6]) {
+ $cs -= $v;
+}
+
+$cs &= 0xffffffff;
+
+print "Correct checksum: ".sprintf("%08x", $cs)."\n";
+
+if ($cs ne $vectors[7]) {
+ print "Fixing checksum\n";
+
+ open BIN, "+<$bfn" or die "Unable to write $bfn: $!";
+ seek(BIN, 7*4, 0);
+ print BIN pack("L", $cs);
+ close BIN;
+}
diff --git a/firmware/lpc17xx/LPC17xx.ld b/firmware/lpc17xx/LPC17xx.ld
index 4aa5d0c..8f3e8e9 100644
--- a/firmware/lpc17xx/LPC17xx.ld
+++ b/firmware/lpc17xx/LPC17xx.ld
@@ -1,182 +1,204 @@
-/* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-* THE AUTHORS SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. USE IT AT YOUR OWN RISK */
-
-MEMORY
-{
- /* LPC1768 : 512k ROM + 64k SRAM */
- /*------------------------------ */
-
- /* On-chip ROM is a readable (r), executable region (x) */
- /* On-chip SRAM is a readable (r), writable (w) and */
- /* executable region (x) */
-
- /* Main ROM region - 512k for LPC1768 */
- IROM (rx) : ORIGIN = 0x00002000, LENGTH = 512k
-
- /* local static RAM - 32k for LPC1756 */
- IRAM0 (rwx) : ORIGIN = 0x10000000, LENGTH = 32k
-
- /* AHB SRAM - 16k for LPC1756 - often used for USB */
- IRAM1 (rwx) : ORIGIN = 0x2007C000, LENGTH = 16k
- IRAM2 (rwx) : ORIGIN = 0x20080000, LENGTH = 16k
-}
-
-/* SECTION command : Define mapping of input sections */
-/* into output sections. */
-
-SECTIONS
-{
- /******************************************/
- /* code section */
-
- /* "normal" code */
-
- .text :
- {
- KEEP(*(.isr_vector .isr_vector.*))
- *(.text .text.*)
- *(.gnu.linkonce.t.*)
- *(.glue_7)
- *(.glue_7t)
- *(.gcc_except_table)
- *(.rodata .rodata*)
- *(.gnu.linkonce.r.*)
- } >IROM
-
- /******************************************/
- /* .ctors .dtors are used for c++ constructors/destructors */
- .ctors :
- {
- . = ALIGN(4);
- PROVIDE(__ctors_start = .);
- KEEP(*(SORT(.ctors.*)))
- KEEP(*(.ctors))
- PROVIDE(__ctors_end = .);
- } >IROM
-
- .dtors :
- {
- . = ALIGN(4);
- PROVIDE(__dtors_start = .);
- KEEP(*(SORT(.dtors.*)))
- KEEP(*(.dtors))
- PROVIDE(__dtors_end = .);
-
- . = ALIGN(4);
- /* End Of .text section */
- _etext = .;
- _sifastcode = .;
- } >IROM
-
- /**************************************************/
- /* fastcode - copied at startup & executed in RAM */
-
- .fastcode :
- {
- . = ALIGN (4);
- _sfastcode = . ;
-
- *(.glue_7t) *(.glue_7)
- *(.fastcode)
-
- /* add other modules here ... */
-
- . = ALIGN (4);
- _efastcode = . ;
- _sidata = .;
- } >IRAM0 AT>IROM
-
- /******************************************/
- /* This used for USB RAM section */
- .usb_ram (NOLOAD):
- {
- *.o (USB_RAM)
- } > IRAM1
-
- /******************************************/
- /* data section */
- .data :
- {
- _sidata = LOADADDR (.data);
- . = ALIGN(4);
- _sdata = .;
-
- *(vtable vtable.*)
- *(.data .data.*)
- *(.gnu.linkonce.d*)
-
- . = ALIGN(4);
- _edata = . ;
- } >IRAM0 AT>IROM
-
- /******************************************/
- /* For no-init variables section */
- .bss (NOLOAD) :
- {
- . = ALIGN(4);
- _sbss = . ;
-
- *(.bss .bss.*)
- *(.gnu.linkonce.b*)
- *(COMMON)
-
- . = ALIGN(4);
- _ebss = . ;
- } >IRAM0
-
- /******************************************/
- /* For stack section */
- .stackarea (NOLOAD) :
- {
- . = ALIGN(8);
- _sstack = .;
-
- *(.stackarea .stackarea.*)
-
- . = ALIGN(8);
- _estack = .;
-
- . = ALIGN(4);
- _end = . ;
- PROVIDE (end = .);
-
- } > IRAM0
-
- /******************************************/
- /* Stabs debugging sections. */
- .stab 0 : { *(.stab) }
- .stabstr 0 : { *(.stabstr) }
- .stab.excl 0 : { *(.stab.excl) }
- .stab.exclstr 0 : { *(.stab.exclstr) }
- .stab.index 0 : { *(.stab.index) }
- .stab.indexstr 0 : { *(.stab.indexstr) }
- /* .comment 0 : { *(.comment) } */
- /* DWARF debug sections.
- Symbols in the DWARF debugging sections are relative to the beginning
- of the section so we begin them at 0. */
- /* DWARF 1 */
- .debug 0 : { *(.debug) }
- .line 0 : { *(.line) }
- /* GNU DWARF 1 extensions */
- .debug_srcinfo 0 : { *(.debug_srcinfo) }
- .debug_sfnames 0 : { *(.debug_sfnames) }
- /* DWARF 1.1 and DWARF 2 */
- .debug_aranges 0 : { *(.debug_aranges) }
- .debug_pubnames 0 : { *(.debug_pubnames) }
- /* DWARF 2 */
- .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
- .debug_abbrev 0 : { *(.debug_abbrev) }
- .debug_line 0 : { *(.debug_line) }
- .debug_frame 0 : { *(.debug_frame) }
- .debug_str 0 : { *(.debug_str) }
- .debug_loc 0 : { *(.debug_loc) }
- .debug_macinfo 0 : { *(.debug_macinfo) }
- /* SGI/MIPS DWARF 2 extensions */
- .debug_weaknames 0 : { *(.debug_weaknames) }
- .debug_funcnames 0 : { *(.debug_funcnames) }
- .debug_typenames 0 : { *(.debug_typenames) }
- .debug_varnames 0 : { *(.debug_varnames) }
-}
+/* From: http://ulan.git.sourceforge.net/git/gitweb.cgi?p=ulan/sysless;a=blob;f=board/arm/lpc17xx-common/libs/ldscripts/lpc1768.ld-cfg;h=c37ec2de11b5b3d9667a89257c4ec3acecb09b64;hb=HEAD */
+
+PROVIDE( __bbconf_pt_addr = 0 );
+
+MEMORY
+{
+ /* LPC176[89] : 512 ROM + 32k SRAM + 16k SRAM + 16k SRAM */
+ /*--------------------------------------------------- */
+
+
+ /* Main ROM region - 512k for LPC176[89] */
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512k
+
+ /* local static RAM - 32k for LPC176[89] */
+ IRAM0 (rwx) : ORIGIN = 0x10000000, LENGTH = 32k
+
+ /* stack location */
+ STACK (rw) : ORIGIN = 0x10000000 + 0x00007FE0 - 4, LENGTH = 4
+
+ /* AHB SRAM - 2x16k for LPC176[89] - often used for USB */
+ USBRAM (rwx) : ORIGIN = 0x2007C000, LENGTH = 4k
+ IRAM1 (rwx) : ORIGIN = 0x2007D000, LENGTH = 28k
+}
+
+/* From: http://ulan.git.sourceforge.net/git/gitweb.cgi?p=ulan/sysless;a=blob;f=board/arm/lpc17xx-common/libs/ldscripts/lpc17xx-base.ld-boot;h=b2c64fa863fba493dfc23aa3a6604851b73e1770;hb=HEAD */
+
+/***********************************************************************/
+/* */
+/* ROM.ld: Linker Script File */
+/* */
+/***********************************************************************/
+
+ENTRY(g_pfnVectors)
+
+/* SECTION command : Define mapping of input sections */
+/* into output sections. */
+
+SECTIONS
+{
+ /******************************************/
+ /* code section */
+
+ /* "normal" code */
+
+ .text :
+ {
+ KEEP(*(.isr_vector .isr_vector.*))
+ *(.text .text.*)
+ *(.gnu.linkonce.t.*)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.gcc_except_table)
+ *(.rodata .rodata*)
+ *(.gnu.linkonce.r.*)
+ } >FLASH
+
+ /******************************************/
+ /* .ctors .dtors are used for c++ constructors/destructors */
+ .ctors :
+ {
+ . = ALIGN(4);
+ PROVIDE(__ctors_start = .);
+ KEEP(*(SORT(.ctors.*)))
+ KEEP(*(.ctors))
+ PROVIDE(__ctors_end = .);
+ } >FLASH
+
+ .dtors :
+ {
+ . = ALIGN(4);
+ PROVIDE(__dtors_start = .);
+ KEEP(*(SORT(.dtors.*)))
+ KEEP(*(.dtors))
+ PROVIDE(__dtors_end = .);
+
+ . = ALIGN(4);
+ /* End Of .text section */
+ _etext = .;
+ _sifastcode = .;
+ } >FLASH
+
+ .irqarea (NOLOAD):
+ {
+ . = ALIGN (256);
+ *(.irqarea .irqarea.*)
+
+ } >IRAM0
+
+ /**************************************************/
+ /* fastcode - copied at startup & executed in RAM */
+
+ .fastcode :
+ {
+ . = ALIGN (4);
+ _sfastcode = . ;
+
+ *(.glue_7t) *(.glue_7)
+ *(.fastcode)
+
+ /* add other modules here ... */
+
+ . = ALIGN (4);
+ _efastcode = . ;
+ _sidata = .;
+ } >IRAM0 AT>FLASH
+
+ /******************************************/
+ /* data section */
+ .data :
+ {
+ _sidata = LOADADDR (.data);
+ . = ALIGN(4);
+ _sdata = .;
+
+ *(vtable vtable.*)
+ *(.data .data.*)
+ *(.gnu.linkonce.d*)
+
+ . = ALIGN(4);
+ _edata = . ;
+ } >IRAM0 AT>FLASH
+
+ /******************************************/
+ /* For no-init variables section */
+ .bss (NOLOAD) :
+ {
+ . = ALIGN(4);
+ _sbss = . ;
+ __bss_start__ = . ;
+
+ *(.bss .bss.*)
+ *(.gnu.linkonce.b*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = . ;
+ __bss_end__ = .;
+
+ . = ALIGN(4);
+ _end = . ;
+ PROVIDE (end = .);
+ } >IRAM0
+
+ .stack :
+ {
+ _stack = .;
+ } >STACK
+
+ /******************************************/
+ /* This used for USB RAM section */
+ .usbram (NOLOAD):
+ {
+ _usbram = . ;
+ USB_RAM_ADR = . ;
+ *(.usbram)
+ . = ALIGN(4);
+ _eusbram = . ;
+ _usbram_end = . ;
+ } > USBRAM
+
+ /* Extra RAM */
+ .iram1 (NOLOAD):
+ {
+ _iram = . ;
+ *(.iram1)
+ . = ALIGN(4);
+ _iram_end = . ;
+ } > IRAM1
+
+ /******************************************/
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ /* .comment 0 : { *(.comment) } */
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+}
diff --git a/firmware/openocd.cfg b/firmware/openocd.cfg
index 44bdfb3..9eb7126 100644
--- a/firmware/openocd.cfg
+++ b/firmware/openocd.cfg
@@ -6,7 +6,6 @@
jtag_khz 1
# This is the JTAG connector I use
-#source [find interface/olimex-arm-usb-tiny-h.cfg]
source [find interface/buspirate.cfg]
# This is close enough to the board I use
@@ -31,4 +30,4 @@ sleep 200
#flash write_image erase vcomdemo.hex
#verify_image vcomdemo.hex
-#reset runq
+#reset run
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-22 15:15:27 +0000